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congatec introduces a new carrier board design training program
Congatec – a leading vendor of embedded and edge computing technology – announces the launch of a new carrier board design training program to impart best practice knowledge on how to design-in leading Computer-on-Module standards COM-HPC and SMARC.
The goal is to provide system architects with a quick, easy, and efficient deep dive into the design rules of these PICMG and SGET standards. The training courses will guide engineers through all the mandatory and recommended design essentials and best practice carrier board schematics for Computer-on-Modules and will efficiently empower developers to start their own carrier board design projects. The knowledge transfer focusses on standard-compliant carrier board designs that are essential to build interoperable, scalable, and durable customized embedded computing platforms. The academy will operate globally, offering online and on-premises courses, and targets developers at OEMs, VARs and system integrators.
“The official design guides published by the standardization bodies are a great resource, but ultimately, they are just requirement specifications. Developers must also learn how to best implement these fundamentals in the real world. We have set up the training program with the goal in mind to accelerate the knowledge transfer required to start such real-world development projects. At the end of the training, developers should be confident to have learned everything needed to start their own carrier board designs,” explains Daniel Stadler, Manager Support & Design-In at congatec.
With the new congatec training program for carrier board designs, engineers get a kick-start into the world of high-end embedded and edge computing – from PCB layout principles, power management rules and signal integrity requirements to component selection. Sessions with a special focus on computer interfaces will provide guidance on how to avoid pitfalls in the challenging design of high-speed serial communications – from PCIe Gen 5, USB 3.2 Gen 2 and USB 4 with Thunderbolt, via USB‑C and Ethernet up to 100GbE, including the management of sideband signals that must be deserialized on the carrier board for COM-HPC. Last but not least, the course will explain how best practice designs utilize interface standards such as eSPI, I²C, and GPIOs. An introduction of congatec’s x86 firmware implementation – ranging from embedded BIOS to Board Management Controller and Module Management Controller features – rounds off the design-in sessions. Finally, there are sessions on verification and test strategies to tackle all challenges from initial carrier board design verification to mass production testing.
The COM-HPC and SMARC carrier board design courses are a service of the congatec training academy and require a service subscription. Each participant will automatically receive a certificate of successful participation, confirming that they have acquired the appropriate knowledge to become a carrier board design expert. More information about where and when the congatec training program will start and detailed course descriptions can be found at https://www.congatec.com/en/designintraining/. On request congatec can also arrange individual training sessions for groups of 5 participants or more.